/* Configure interrupts */
- t4_framer_out(wc, unit, 0x46, 0x00); /* GCR: Interrupt on Activation/Deactivation of each */
+ t4_framer_out(wc, unit, FRMR_GCR, 0x00); /* GCR: Interrupt on Activation/Deactivation of each */
/* Configure system interface */
- t4_framer_out(wc, unit, 0x3e, 0xc2); /* SIC1: 8.192 Mhz clock/bus, double buffer receive / transmit, byte interleaved */
- t4_framer_out(wc, unit, 0x3f, 0x20 | (unit << 1)); /* SIC2: No FFS, no center receive eliastic buffer, phase */
- t4_framer_out(wc, unit, 0x40, 0x04); /* SIC3: Edges for capture */
- t4_framer_out(wc, unit, 0x45, 0x00); /* CMR2: We provide sync and clock for tx and rx. */
+ t4_framer_out(wc, unit, FRMR_SIC1, 0xc2); /* SIC1: 8.192 Mhz clock/bus, double buffer receive / transmit, byte interleaved */
+ t4_framer_out(wc, unit, FRMR_SIC2, 0x20 | (unit << 1)); /* SIC2: No FFS, no center receive eliastic buffer, phase */
+ t4_framer_out(wc, unit, FRMR_SIC3, 0x04); /* SIC3: Edges for capture */
+ t4_framer_out(wc, unit, FRMR_CMR2, 0x00); /* CMR2: We provide sync and clock for tx and rx. */
if (!wc->t1e1) { /* T1 mode */
- t4_framer_out(wc, unit, 0x22, 0x03); /* XC0: Normal operation of Sa-bits */
- t4_framer_out(wc, unit, 0x23, 0x84); /* XC1: 0 offset */
+ t4_framer_out(wc, unit, FRMR_XC0, 0x03); /* XC0: Normal operation of Sa-bits */
+ t4_framer_out(wc, unit, FRMR_XC1, 0x84); /* XC1: 0 offset */
if (wc->tspans[unit]->spantype == TYPE_J1)
- t4_framer_out(wc, unit, 0x24, 0x83); /* RC0: Just shy of 1023 */
+ t4_framer_out(wc, unit, FRMR_RC0, 0x83); /* RC0: Just shy of 1023 */
else
- t4_framer_out(wc, unit, 0x24, 0x03); /* RC0: Just shy of 1023 */
- t4_framer_out(wc, unit, 0x25, 0x84); /* RC1: The rest of RC0 */
+ t4_framer_out(wc, unit, FRMR_RC0, 0x03); /* RC0: Just shy of 1023 */
+ t4_framer_out(wc, unit, FRMR_RC1, 0x84); /* RC1: The rest of RC0 */
} else { /* E1 mode */
- t4_framer_out(wc, unit, 0x22, 0x00); /* XC0: Normal operation of Sa-bits */
- t4_framer_out(wc, unit, 0x23, 0x04); /* XC1: 0 offset */
- t4_framer_out(wc, unit, 0x24, 0x04); /* RC0: Just shy of 1023 */
- t4_framer_out(wc, unit, 0x25, 0x04); /* RC1: The rest of RC0 */
+ t4_framer_out(wc, unit, FRMR_XC0, 0x00); /* XC0: Normal operation of Sa-bits */
+ t4_framer_out(wc, unit, FRMR_XC1, 0x04); /* XC1: 0 offset */
+ t4_framer_out(wc, unit, FRMR_RC0, 0x04); /* RC0: Just shy of 1023 */
+ t4_framer_out(wc, unit, FRMR_RC1, 0x04); /* RC1: The rest of RC0 */
}
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